IWJT2016  May 9- 10, 2016 Shanghai, China

16th International Workshop on Junction Technology
FuXuan Hotel at Fudan University


 

 

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Last update:
May. 10, 2016



The 16th International Workshop on Junction Technology (IWJT2016) will be held on May 9 - 10, 2016 in Shanghai, China. The IWJT, started in 2000 and was held annually in Japan or China, is an open forum focused on the needs and interest of the community of a junction formation technology in semiconductors. At the past IWJTs, a number of eminent and experienced scientists and engineers from Asia, America, and Europe presented their latest results on junction technology. The workshop will provide a good opportunity for researchers and engineers to present their new research results, and exchange ideas with leading scientists in this field.

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Oral Presentation (All the talks are oral talks)
Presentation time:

Keynote speech (45 min): 40 min Talk Time + 5 min Q/A (question/answer)
Invited paper (30 min): 25min Talk Time + 5 min Q/A
Contributed paper (15 min): 12 min Talk Time + 3 min Q/A

A computer and a PC-compatible projector will be provided in each meeting room. Presenters may bring either a CD-ROM, a USB driver, or his/her own laptop to the meeting room. All the presentation files are preferred to be copied into that computer before the session (unless the format of the PowerPoint file does not match well in that computer). Student helpers will assist the presenters before and during the session.

 

Registration site and time
15:00-18:00, May 8, 2016, Lobby, FuXuan Hotel
08:00-11:00, May 9, 2016, 4th floor, FuXuan Hotel
 

Program

 

May 9 (Mon.)

09:00-09:30

Opening                      

(Auditorium, 4th floor)

 

May 9 (Mon.)

09:30-11:30

Plenary Session

(Auditorium, 4th floor)

 

Co-Chairs:

Bing-Zong Li, Fudan University, China

Kazuo Tsutsui, Tokyo Inst. of Technol., Japan

 

K1-1

End of the scaling theory and Moore’s law

1

09:30

Hiroshi Iwai1,2

 

(Keynote)

1Tokyo Institute of Technology, Yokohma, Japan;2National Chao Tung University, Hsinchu. Twian

 

Coffee Break (10:15-10:45)

K1-2

From Millisecond to Nanosecond Annealing: Challenges and New Approach

5

10:45

Yun Wang, Shaoyin Chen, Michael Shen, Xiaoru Wang

 

(Keynote)

Ultratech Inc., USA

 

May 9 (Mon.)

13:30-15:30

Contact Technology

(Meeting Room 1, 4th floor)

 

Chair:

Yu-Long Jiang, Fudan University, China

 

S1-1

Ohmic Contacts for AlGaN/GaN HEMTs with Artificially Introduced Uneven Structures at Metal/AlGaN Interfaces

9

13:30

Kazuo Tsutsui

 

(Invited)

Tokyo Institute of Technology, Japan

 

 

 

 

S1-2

Improving Contact Resistance with Advanced Ion Implantation and Rapid Thermal Annealing

13

14:00

Er-Xuan Ping, Fareen Adeni Khaja

 

(Invited)

Applied Materials, USA

 

 

 

 

S1-3

Metal/Insulator/Semiconductor Contacts for Ultimately Scaled CMOS Nodes: Projected Benefits and Remaining Challenges

14

14:30

Julien Borrel1,2,3, Louis Hutin2, Helen Grampeix2, Emmanuel Nolot2, Magali Tessaire2, Guillaume Rodriguez2, Yves Morand1, Fabrice Nemouchi2, Magali Grégoire1, Emmanuel Dubois3, Maud Vinet2

 

(Invited)

1STMicroelectronics, France; 2CEA, LETI, Minatec Campus, France; 3IEMN, UMR 8520 CNRS, France

 

 

 

 

S1-4

MIS or MS? Source/Drain Contact Scheme Evaluation for 7nm Si CMOS Technology And Beyond

19

15:00

Hao Yu1,2, Marc Schaekers1, Steven Demuynck1, Kathy Barla1, Anda Mocuta1, Naoto Horiguchi1, Nadine Collaert1, Aaron Voon–Yew Thean1, Kristin De Meyer1,2

 

(Invited)

1Imec, Belgium; 2K. U. Leuven, Belgium

 

Coffee Break (15:30-16:00)

May 9 (Mon.)

16:00-16:45

Device Technology

(Meeting Room 1, 4th floor)

 

Chair:

Dongping Wu,Fudan University, China

 

S2-1

Dual Sources U-shape Gate Tunnel FETs with High On-current and Steep SS

25

16:00

Zhi Jiang1, Yiqi Zhuang, Cong Li, Ping Wang

 

 

1Xidian University, China

 

 

 

 

S2-2

P+-Ge1-xSnx / p--Ge1-x-ySixSny / n-Ge1-x-ySixSny NTFET Analysis and the realization of n-Ge1-x-ySixSny Ohmic Contact

28

16:15

Suyuan Wang, Jun Zheng, Chunlai Xue, Chuanbo Li, Yuhua Zuo, Buwen Cheng, Qiming Wang

 

 

Chinese Academy of Sciences, China

 

 

 

 

S2-3

A Novel High-voltage LDMOS with Folded Drift Region

31

16:30

Ling Du, Yufeng Guo, Jiafei Yao, Jun Zhang, Kemeng Yang

 

 

1Nanjing University of Posts and Telecommunications, China; 2Jiangsu Province Engineering Lab of RF integration & Micropackage, China

 

May 10 (Tues.)

08:00-11:30

Doping Technology

(Meeting Room 1, 4th floor)

 

Co-Chairs:

Shu Qin, Micron Technologies, USA

Masayasu Tanjo, Nissin Ion Equipment Co.,Ltd, Japan

 

S3-1

Vacancy-type defects in Mg-implanted GaN probed by a monoenergetic positron beam

35

08:00

Akira Uedono1, Shinya Takashima2, Masaharu Edo2, Katsunori Ueno2, Hideaki Matsuyama2, Hiroshi Kudo3, Hiroshi Naramoto3, Shoji Ishibashi4

 

(Invited)

1University of Tsukuba, Japan; 2Advanced Technology Lab. Fuji Electric Co., Ltd., Japan; 3University of Tsukuba, Japan; 4National Institute of Advanced Industrial Science and Technology (AIST), Japan

 

 

 

 

S3-2

Ultra Shallow Junction (USJ) Formation Using Plasma assisted Doping on 3D Devices Structures

39

08:30

YS Kim, YounGi Hong, Ivan Berry

 

 

Lam Research Corp., USA

 

 

 

 

S3-3

New processes for homojunction silicon solar cells doping: From beam line to plasma immersion ion implantation

44

08:45

Marianne Coig1, Frédéric Milési1, Jean-François Lerat2, Thibaut Desrues2, Jérôme Le Perchec2, Adeline Lanterne2, Laurent Lachal1, Frédéric Mazen1

 

(Invited)

1CEA, LETI, MINATEC Campus, France; 2CEA, INES, France

 

 

 

 

S3-4

Device Performance Improvement with Implantation Balancing Energy Contamination and Productivity

51

09:15

Yonggen He1,2, Guohui Cai2, Zuyuan Zhou2, Youfeng He2, Jingang Wu2, David Wei Zhang1, Ting Cai3, Junfeng Lu3, Ganming Zhao3, Baonian Guo4

 

 

1Fudan University, China; 2Semiconductor Manufacturing International Corp., China; 3Applied Materials China, China; 4Applied Materials, USA

 

Coffee Break (9:30-10:00)

S3-5

Ion Implantation Technology in SiC for High-Voltage/High-Temperature Devices

54

10:00

T. Kimoto, K. Kawahara, N. Kaji, H. Fujihara, J. Suda

 

(Invited)

Kyoto University, Japan

 

 

 

 

S3-6

Ion Implant Technology for State-of-the-art High Efficiency Solar Cell Applications

59

10:30

Guangyao Jin1, Yaojie Sun3, Yizhe Wang1, David Wei Zhang2, Lin Chen2, Chuan He1, Jeff Boeker1, Junhua Hong1, Shoujun Chen1, Renjie Liu1, Yimin Lv1, Jiong Chen1

 

 

1Kingstone Semiconductor Joint Stock Co., Ltd., China; 2Fudan University, China; 3Fudan University, China

 

 

 

 

S3-7

Implant Application for Advanced Memory

63

10:45

Wei (David) Zou, Kyu-Ha Shim, Todd Henry

 

(Invited)

Applied Materials, USA

 

 

 

 

S3-8

FinFET Doping with PSG/BSG Glass Mimic doping by Ultra Low Energy Ion Implantation

64

11:15

Chuan He1, Lin Chen2, David Wei Zhang2, Junhua Hong1, Guangyao Jin1, Jin Zhang1, Jeff Boeker1, Renjie Liu1, Hao Jin1, Yimin Lv1, Jiong Chen1

 

 

1Kingstone Semiconductor Joint Stock Co., Ltd., China; 2Fudan University, China

 

May 10 (Tues.)

13:30-15:15

Annealing Technology

(Meeting Room 1, 4th floor)

 

Chair:

Yun Wang, UltraTech Inc., USA

 

S4-1

Activation of Impurity Atoms in 4H-SiC Wafer by Atmospheric Pressure Thermal Plasma Jet Irradiation

68

13:30

S. Higashi, K. Maruyama, H. Hanafusa

 

(Invited)

Hiroshima University, Japan

 

 

 

 

S4-2

Dopant activation and crystal recovery in arsenic-implanted ultra-thin silicon-on-insulator structures using 308nm nanosecond laser annealing

72

14:00

S. Kerdilès1,2, P.Acosta Alba1,2, B. Mathieu1,2, M. Veillerot1,2, R. Kachtouli1,2, P. Besson1,2,3, H.Denis1,2,F.Mazzamuto4, I. Toqué-Trésonne4, K. Huet4, C. Fenouillet-Béranger1,2

 

 

1Université Grenoble Alpes, France; 2CEA, LETI, MINATEC Campus, France; 3STMicroelectronics, France; 4SCREEN-LASSE, France

 

 

 

 

S4-3

Defects and dopant activation in laser annealed Si and Ge

76

14:15

F. Cristiano1 and S. Boninelli2

 

(Invited)

1LAAS-CNRS, Toulouse, France;2 IMM-CNR, Catania, Italy

 

 

 

 

S4-4

10 nm-Deep n+/p and p+/n Ge Junctions with High Activation Formed by Ion Implantation and Flash Lamp Annealing (FLA)

77

14:45

H. Tanimura1, H. Kawarazaki1, K. Fuse1, M. Abe1, T. Yamada1, Y. Ono1, M. Furukawa1, A.Ueda1, Y. Ito1, T.Aoyama1, S. Kato1, I. Kobayashi1 H. Onoda2, Y. Nakashima2, T. Nagayama2, N. Hamamoto2, S. Sakai2

 

 

1SCREENSemiconductor Solutions Co., Japan; 2Nissin Ion Equipment Co., Japan

 

Coffee Break (15:15-15:45)

May 10 (Tues.)

15:45-17:15

Characterizations and Metrologies

 (Meeting Room 1, 4th floor)

 

Chair:

Runling Li, HLMC, China

 

S5-1

Anisotropic Strain Evaluation Induced in Group IV Materials using Liquid-Immersion Raman Spectroscopy

81

15:45

Atsushi Ogura, Kazuma Takeuchi

 

(Invited)

Meiji University, Japan

 

 

 

 

S5-2

Metrologies for conformal doping on 3D structures like FinFET

87

16:15

Lei Shi, Jin An, Jianou Shi, Lu Yu

 

(Invited)

KLA-Tencor Semiconductor Equipment Technology (Shanghai) Co., China

 

 

 

 

S5-3

Challenges of 2-D (3-D) Device Doping Process and Doping Profiling Metrology

91

16:45

Shu Qin

 

(Invited)

Micron Technology Inc., USA

 

     

 

 at web

Workshop Scope
(Papers are solicited in, but not limited to the following)

  • Doping Technology --- Ion implantation, plasma doping, gas and solid doping

  • Annealing Technology --- Rapid thermal process, laser annealing, flash annealing, SPE, lattice damage and defects

  • Junction Technology for Novel CMOS Device Structures --- Junction for SOI, strained Si, SiGe, Ge, Schottky barrier S/D MOSFET, and FinFET(Tri-gate FET)

  • Silicide and Contact Technology for CMOS --- Silicide materials and salicide technology, elevated S/D, low barrier contact, surface pre-treatment

  • Junction and Contact Technologies for Compound Semiconductors and Quantum Devices --- Schottky and ohmic contacts to wide bandgap compound semiconductors, junction and contact technologies for carbon nanotube, graphene, 2D material and other 2D or nano-, quantum devices, hetero-junction devices

  • Contact and Junction Technologies for Energy Harvesting Devices---solar cells

  • Characterization for Shallow Junction --- Physical and electrical characterization of ultra-shallow junction

  • Modeling and Simulation --- Modeling and simulation of ultra-shallow junction formation of CMOS

  • Equipment, Materials and Substrates for Junction Technology


 


Organized by
IEEE EDS Shanghai Chapter
IEEE EDS Japan Chapter
 

Technical Co-Sponsored by
IEEE EDS

Supported by
Fudan University



 

 

 
 


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